Albert Cesari
Electronic Engineer, INDRA SISTEMAS
Albert Cesari was born in 1978 in Barcelona.
He received the B.S. degree from the Universitat de les Illes Balears, Palma de Mallorca (SPAIN) in 2000, and the M.S. degree from the Technical University of Catalonia, Barcelona (SPAIN), in 2003, both in Telecommunication Engineering.
He has been working as Firmware and Electronics Engineer/Developer for Biosystems S.A., R&D Department, Instrument Division Barcelona (SPAIN) from 2002 to 2004.
In 2004 he was awarded with a Fundacio La Caixa grant for post-graduate studies in France (La Caixa de Barcelona and the French Embassy in Spain).
He holds a Ph.D. degree in Electronic Engineering from the LAAS-CNRS, Université de Toulouse, Toulouse(FRANCE), with a dissertation on linearity and efficiency improvement for RF Power Amplifiers (2004-2008).
Since 2007 he is workig as Hardware engineer for INDRA SISTEMAS, Airborne Radars Department, Torrejon de Ardoz (SPAIN).
Albert Cesari is member of the IEEE.
Radar Processor Unit LRU Responsible: Requirements and interfaces definition, documentation elaboration, architectural design.
Coordination taking responsibility for the detail of the electronics development, integration, ruggedization, and test activities.
Follow-up: Internal designers, external suppliers, outsourced activities.
2004 - 2007Ph.D. dissertation elaboration and contribution to the scientific and industrial communities.
Design of innovative signal processing algorithms, from proposal to validation, including hardware development (involving high speed signal acquisition and generation, FPGA/firmware & DSP programming, RF).
Laboratory correspondent: European and National research programs.
2002 - 2004Assist in design completion, product prototyping, and test activities.
Hardware, FPGA/firmware and embedded software development.
